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Digital PID Controller Based on FPGA
XU Zhong-ren, JIANG Li, MU Ke, ZHU Wen-wei
The conventional method of achieving PID by FPGA consumes a lot of multiplier, adder and memory. FPGA hardware resources can not be reasonably used, and system holds high energy consumption. Research on using direct DA ( DA-Ⅰ) and improved DA ( DA-Ⅱ) algorithm by FPGA to realize the digital PID controller. Compared with the conventional method, DA-Ⅰ algorithm saves many hardware resources;because of using adder, LUT unit and time delay module etc, DA-Ⅱ algorithm can reduce the unit modules further and reduce energy consumption by the application of two stage pipeline technology. Through the comparison of PID controller by the DA-Ⅰ and DA-Ⅱ algorithm, discussed the improved PID controller performance about the hardware resource, processing speed, complexity and energy consumption etc.
2012, 32 (3):
74-79.
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